UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 528

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UPD78F1233GB-GAH-AX

Manufacturer Part Number
UPD78F1233GB-GAH-AX
Description
MCU 16BIT 78K0R/LX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1233GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1233GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
526
(1) Peripheral enable register 1 (PER1)
Address: F00F1H After reset: 00H R/W
Symbol
PER1
PER1 is used to enable or disable supplying the clock to the peripheral hardware macro. Power consumption
and noise are reduced by stopping the clock supply to unused hardware.
Make sure to set bit 3 (OACMPEN) to 1 to use a comparator or an programmable gain amplifier.
PER1 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Cautions 1. Make sure to set OACMPEN to 1 first, when setting the comparator or programmable gain
OACMPEN
7
0
0
1
2. Make sure to set bits 0 to 2 and bits 4 to 7 of the PER1 register to “0”.
amplifier.
amplifier will be ignored and all values read will be initialized when OACMPEN is set to 0.
Stops input clock supply
• The SFR used with the comparator or programmable gain amplifier cannot be written.
• The comparator or programmable gain amplifier is reset.
Enables input clock supply
• The SFR used with the comparator or programmable gain amplifier can be read and written.
CHAPTER 8 COMPARATORS/PROGRAMMABLE GAIN AMPLIFIERS
Figure 8-3. Format of Peripheral Enable Register 1 (PER1)
6
0
Writing to the control register of the comparator or programmable gain
Comparator/programmable gain amplifier input clock control
5
0
User’s Manual U19678EJ1V1UD
4
0
OACMPEN
<3>
2
0
1
0
0
0

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