UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 112

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3.1.6 Data memory addressing
the register or memory relevant to the execution of instructions.
78K0R/Ix3, based on operability and other considerations. For areas containing data memory in particular, special
addressing methods designed for the functions of special function registers (SFR) and general-purpose registers are
available for use. Figures 3-6 to 3-9 show correspondence between data memory and addressing.
110
Addressing refers to the method of specifying the address of the instruction to be executed next or the address of
Several addressing modes are provided for addressing the memory relevant to the execution of instructions for the
Note
F 0 0 0 0 H
E F F F F H
F F F F F H
F F F 2 0 H
F F F 1 F H
F F F 0 0 H
F F E 2 0 H
F F E 1 F H
F F B 0 0 H
F F A F F H
F 4 0 0 0 H
F 3 F F F H
F 1 0 0 0 H
F 0 F F F H
F 0 8 0 0 H
F 0 7 F F H
0 4 0 0 0 H
0 3 F F F H
0 0 0 0 0 H
F F E F F H
F F E E 0 H
F F E D F H
Figure 3-6. Correspondence Between Data Memory and Addressing (
Use of the area FFE20H to FFEDFH is prohibited when using the self-programming function. Since this
area is used for self-programming library.
Special function register (2nd SFR)
General-purpose register
Special function register (SFR)
32 bytes
Flash memory
Reserved
256 bytes
Reserved
Reserved
RAM
Mirror
12 KB
16 KB
1 KB
2 KB
Note
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U19678EJ1V1UD
SFR addressing
Register addressing
Short direct
addressing
μ
PD78F1201, 78F1211)
Direct addressing
Register indirect addressing
Based addressing
Based indexed addressing