UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 617

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Address: F0126H, F0127H (SPS0), F0166H, F0167H (SPS1)
Symbol
SPS0
Notes 1. When changing the clock selected for f
Cautions 1. Be sure to clear bits 15 to 8 to “0”.
Remarks 1. f
2. SAU can be operated at a fixed division ratio of the subsystem clock, regardless of the f
PRS
0k3
15
0
0
0
0
0
0
0
0
1
1
1
1
1
0
(main system clock, sub system clock), by operating the interval timer for which f
selected as the count clock (setting TIS02 bit of the timer input select register 0 (TIS0) to 1) and
selecting INTTM02 by using the SPS0 register in channel 2 of TAUS. When changing f
SAU and TAUS must be stopped as described in Note 1 above.
value), do so after having stopped (serial channel stop register 0 (ST0) = 000FH) the operation of the
serial array unit (SAU). When selecting INTTM02 for the operation clock, also stop the timer array
unit TAUS (timer channel stop register 0 (TT0) = 00FFH).
2. After setting bit 2 (SAU0EN) of the PER0 register to 1, be sure to set serial clock select
2. k = 0, 1
Other than above
PRS
0k2
register 0 (SPS0) after 4 or more f
f
14
CLK
SUB
0
0
0
0
1
1
1
1
0
0
0
0
1
0
: CPU/peripheral hardware clock frequency
: Subsystem clock frequency
Figure 13-5. Format of Serial Clock Select Register 0 (SPS0)
PRS
0k1
13
0
0
1
1
0
0
1
1
0
0
1
1
1
0
PRS
0k0
12
0
1
0
1
0
1
0
1
0
1
0
1
1
0
f
f
f
f
f
f
f
f
f
f
f
f
INTTM02
Setting prohibited
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CHAPTER 13 SERIAL ARRAY UNIT
11
0
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
2
3
4
5
6
7
8
9
10
11
User’s Manual U19678EJ1V1UD
10
0
Note 2
9
0
2 MHz
1 MHz
500 kHz
250 kHz
125 kHz
62.5 kHz
31.3 kHz
15.6 kHz
7.81 kHz
3.91 kHz
1.95 kHz
977 Hz
f
CLK
CLK
CLK
After reset: 0000H
= 2 MHz
clocks have elapsed.
8
0
Section of operation clock (CK0k)
(by changing the system clock control register (CKC)
PRS
013
7
5 MHz
2.5 MHz
1.25 MHz
625 kHz
313 kHz
156 kHz
78.1 kHz
39.1 kHz
19.5 kHz
9.77 kHz
4.88 kHz
2.44 kHz
f
PRS
CLK
012
6
= 5 MHz
R/W
PRS
011
5
PRS
010
10 MHz
5 MHz
2.5 MHz
1.25 MHz
625 kHz
313 kHz
156 kHz
78.1 kHz
39.1 kHz
19.5 kHz
9.77 kHz
4.88 kHz
4
f
CLK
= 10 MHz
Note 1
PRS
003
3
PRS
002
2
SUB
20 MHz
10 MHz
5 MHz
2.5 MHz
1.25 MHz
625 kHz
313 kHz
156 kHz
78.1 kHz
39.1 kHz
19.5 kHz
9.77 kHz
f
CLK
CLK
CLK
/4 has been
PRS
001
= 20 MHz
1
, however,
frequency
PRS
000
615
0