UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 715

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UPD78F1233GB-GAH-AX

Manufacturer Part Number
UPD78F1233GB-GAH-AX
Description
MCU 16BIT 78K0R/LX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1233GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1233GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(2) Operation procedure
Caution
Setting SMR0n and SMR0r registers
After setting the SAU0EN bit of peripheral enable register 0 (PER0) to 1, be sure to set
serial clock select register 0 (SPS0) after 4 or more f
Stopping communication
Starting communication
Setting SCR0n register
Setting SDR0n register
Starting setting to stop
Writing to SS0 register
Setting PER0 register
Setting SPS0 register
Starting initial setting
Setting ST0 register
Figure 13-80. Initial Setting Procedure for UART Reception
Figure 13-81. Procedure for Stopping UART Reception
CHAPTER 13 SERIAL ARRAY UNIT
User’s Manual U19678EJ1V1UD
The start bit is detected.
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set an operation mode, etc.
Set a communication format.
Set a transfer baud rate (setting the
transfer clock by dividing the operation
clock (f
Set the SS0n bit of the target channel to 1
and set SE0n bit to 1 (to enable operation).
Stop communication in midway.
Write 1 to the ST0n bit of the target
channel.
MCK
)).
CLK
clocks have elapsed.
713

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