UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 795

no-image

UPD78F1233GB-GAH-AX

Manufacturer Part Number
UPD78F1233GB-GAH-AX
Description
MCU 16BIT 78K0R/LX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1233GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1233GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.5.13 Wakeup function
and extension code have been received.
addresses do not match.
addresses are transmitted due to the possibility that an arbitration loss may change the master device (which has
generated a start condition) to a slave device.
the wakeup function, and this determines whether interrupt requests are enabled or disabled.
operation clock. An interrupt request signal (INTIICA) is also generated when a local address and extension code
have been received. Operation returns to normal operation by using an instruction to clear (0) the WUP bit after this
interrupt has been generated.
address match.
The I
This function makes processing more efficient by preventing unnecessary INTIICA signal from occurring when
When a start condition is detected, wakeup standby mode is set. This wakeup standby mode is in effect while
However, when a stop condition is detected, bit 4 (SPIE) of IICA control register 0 (IICCTL0) is set regardless of
To use the wakeup function in the STOP mode, set WUP to 1. Addresses can be received regardless of the
Figure 14-22 shows the flow for setting WUP = 1 and Figure 14-23 shows the flow for setting WUP = 0 upon an
2
C bus slave function is a function that generates an interrupt request signal (INTIICA) when a local address
Figure 14-22. Flow When Setting WUP = 1
CHAPTER 14 SERIAL INTERFACE IICA
MSTS = STD = EXC = COI =0?
STOP instruction execution
User’s Manual U19678EJ1V1UD
WUP = 1
START
Wait
Yes
Waits for 3 clocks.
No
793

Related parts for UPD78F1233GB-GAH-AX