UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 429

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UPD78F1233GB-GAH-AX

Manufacturer Part Number
UPD78F1233GB-GAH-AX
Description
MCU 16BIT 78K0R/LX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1233GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1233GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(a) Timer mode register p (TMRp)
(b) Other registers
TMRp
Figure 7-42. Example of Set Contents of Registers of 6-Phase Triangular Wave PWM Output Function
Remark p = 02, 04, 06
CKSp
TOE0:TOEp
TO0:TOp
TOM0:TOMp
TOT0:TOTp
TOL0:TOLp
TDE0:TDEp
TRE0:TREp
TRO0:TROp
TRC0:TRCp
TME0:TMEp
15
0
Operation clock selection
0: Selects CK00 as operation clock of channel p.
14
0
CCS1p
13
1
CCS0p
0: Stops the TOp output operation by counting operation.
1: Enables the TOp output operation by counting operation.
0: Outputs a low level from TOp.
1: Outputs a high level from TOp.
1: Sets slave channel output mode.
1: Sets triangular wave PWM output.
0: Positive logic output (active-high)
1: Inverted output (active-low)
1: Enables dead time control.
0: Stops real-time output.
0: Sets 0 when TREp = 0 (stops real-time output).
0: Does not operate as the real-time output trigger generation channel.
0: Stops modulated output.
12
0
CHAPTER 7 INVERTER CONTROL FUNCTIONS
Count clock selection
TERp
MAS
10B: Selects count clock of master channel.
11
0
Slave/master selection
STSp2
0: Slave channel
10
1
User’s Manual U19678EJ1V1UD
(Slave Channels 2, 4, 6)
STSp1
9
1
Start trigger selection
STSp0
111B: Selects up or down control trigger of master channel.
1
8
CISp1
0
7
CISp0
0
6
Selection of TIp pin input edge
00B: Sets 00B because these are not used.
Operation mode of channel p
1001B: Up and down count
0
5
MDp4
1
4
Setting of operation when
counting is started
0: Does not generate INTTMp
MDp3
3
0
when counting is started.
MDp2
2
0
MDp1
1
1
MDp0
0
0
427

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