UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 242

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UPD78F1233GB-GAH-AX

Manufacturer Part Number
UPD78F1233GB-GAH-AX
Description
MCU 16BIT 78K0R/LX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1233GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1233GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
240
Address: F00F0H
Address: F00F1H
Address: F00F2H
Symbol
Symbol
Symbol
(PER0)
(PER0)
PER0
PER1
PER2
Bit 7
Bit 5
Caution Be sure to clear the following bits to 0.
Notes 1. RTCEN bit is not provided in the 78K0R/IB3. In the 78K0R/IB3, bit 7 of PER0 register is
RTCEN
RTCEN
ADCEN
<7>
7
0
7
0
0
1
0
1
2. IICAEN bit is not provided in the 78K0R/IB3 and the 38-pin and 44-pin products of the the
3. The input clock that can be controlled by RTCEN is used when the register that is used by
Note 1
After reset: 00H
Note 1
After reset: 00H
After reset: 00H
fixed to 0.
78K0R/IC3. In the 78K0R/IB3 and the 38-pin and 44-pin products of the 78K0R/IC3, bit 4 of
PER0 register is fixed to 0.
the real-time counter (RTC) is accessed from the CPU. RTCEN cannot control supply of
the operating clock (f
• Bits 0, 1, 3, and 6 of the PER0 register
• Bits 0 to 2 and 4 to 7 of the PER1 register
• Bits 2 to 7 of the PER2 register
Figure 5-9. Format of Peripheral Enable Registers (1/2)
Stops input clock supply.
• SFR used by the real-time counter (RTC) cannot be written.
• The real-time counter (RTC) is in the reset status.
Enables input clock supply.
• SFR used by the real-time counter (RTC) can be read and written.
Stops input clock supply.
• SFR used by the A/D converter cannot be written.
• The real-time counter (RTC) is in the reset status.
Enables input clock supply.
• SFR used by the A/D converter can be read and written.
(78K0R/IB3 : bits 0, 1, 3, 4, 6, 7, 38-pin and 44-pin products of 78K0R/IC3 : bits 0, 1,
3, 4, 6)
6
0
6
0
6
0
CHAPTER 5 CLOCK GENERATOR
R/W
R/W
R/W
ADCEN
<5>
User’s Manual U19678EJ1V1UD
Control of real-time counter (RTC) input clock supply
5
0
5
0
SUB
) to RTC.
Control of A/D converter input clock supply
IICAEN
<4>
4
0
4
0
Note 2
OACMPEN
<3>
3
0
3
0
SAU0EN
<2>
2
0
2
0
TAUOPEN
Note 3
<1>
1
0
1
0
TAU0EN
<0>
0
0
0
0

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