UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 157

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.2.2 Port 1
mode register 1 (PM1). When the P10 to P17 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 1 (PU1).
Notes 1.
P10/TI02/TO02/
TxD0
P11/TI03/TO03/
RxD0
P12/TI04/TO04
P13/TI05/TO05
P14/TI06/TO06
P15/TI07/TO07
P16/TI08/TO08
P17/TI09/TO09
Port 1 is a I/O port with an output latch. Port 1 can be set to the input mode or output mode in 1-bit units using port
This port can also be used for timer I/O and serial interface data I/O.
Reset signal generation sets port 1 to input mode.
Figure 4-3 shows a block diagram of port 1.
Cautions 1.
2.
3.
In the 38-pin products of the 78K0R/IC3, TxD0 and RxD0 are shared with P73 and P72, respectively.
In the 44-pin products of the 78K0R/IC3 and in the 78K0R/ID3 and 78K0R/IE3, TxD0 and RxD0 are
shared with P73 and P74, respectively.
TI06/TO06 and TI07/TO07 are shared with P50 and P51, respectively, in products other than the
78K0R/IE3.
TI09 is shared with P31, in products other than the 78K0R/IE3.
2.
3.
To use P10/TI02/TO02(P10/TI02/TO02/TxD0), P11/TI03/TO03(P11/TI03/TO03/RxD0), P12/TI04/
TO04, P13/TI05/TO05, P14/TI06/TO06, P15/TI07/TO07, P16/TI08/TO08, or P17/TI09/TO09 as a
general-purpose port, set bits 2 to 9 (TO02 to TO09) of timer output register 0 (TO0) and bits
2 to 9 (TOE02 to TOE09) of timer output enable register 0 (TOE0) to “0”, which is the same as
their default status setting.
To use the crest interrupt signal (INTTMM1) and valley interrupt signal (INTTMV1) of the
inverter control function, output from timer channel 4 must be enabled (by setting TOE04 to
1).
Therefore, P12/TI04/TO04 cannot be used as a general-purpose output port.
To use P10/TI02/TO2/TxD0 and P11/TI03/TO03/RxD0 of the 78K0R/IB3 as a general-purpose
port, note the serial array unit setting. For details, refer to the following tables.
• Table 13-5 Relationship Between Register Settings and Pins (Channel 0: UART0
• Table 13-8 Relationship Between Register Settings and Pins (Channel 1: UART0
Transmission)
Reception).
78K0R/IB3
−
−
−
Note 2
Note 2
Note 3
√
√
√
√
−
P10/TI02/TO02
P11/TI03/TO03
(38-pin)
−
−
−
Note 2
Note 2
Note 3
√
√
−
CHAPTER 4 PORT FUNCTIONS
User’s Manual U19678EJ1V1UD
Note 1
Note 1
P11/TI03/TO03
P10/TI02/TO02
78K0R/IC3
(44-pin)
−
−
−
Note 2
Note 2
Note 3
√
√
−
Note 1
Note 1
P11/TI03/TO03
P10/TI02/TO02
(48-pin)
−
−
−
Note 2
Note 2
Note 3
√
√
−
Note 1
Note 1
P11/TI03/TO03
P10/TI02/TO02
78K0R/ID3
−
−
−
Note 2
Note 2
Note 3
√
√
−
Note 1
Note 1
P11/TI03/TO03
P10/TI02/TO02
78K0R/IE3
√
√
√
√
√
√
Note 1
Note 1
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