UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 657

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

register 0n
SCKp pin
INTCSIp
SDR0n
TSF0n
SIp pin
SS0n
ST0n
SE0n
Shift
(3) Processing flow (in single-reception mode)
Remark
n: Channel number (n = 0 to 2) (n = 2 (78K0R/IB3 and 38-pin products of 78K0R/IC3), n = 0 to 2
(44-pin and 48-pin products of 78K0R/IC3, 78K0R/ID3, and 78K0R/IE3))
p: CSI number (p = 00, 01, 10) (p = 10(78K0R/IB3 and 38-pin products of 78K0R/IC3), p = 00, 01,
10 (44-pin and 48-pin products of 78K0R/IC3, 78K0R/ID3, and 78K0R/IE3))
Write
Figure 13-36. Timing Chart of Master Reception (in Single-Reception Mode)
Data reception (8-bit length)
Dummy data for reception
Reception & shift operation
Receive data 1
CHAPTER 13 SERIAL ARRAY UNIT
(Type 1: DAP0n = 0, CKP0n = 0)
User’s Manual U19678EJ1V1UD
Receive data 1
Read
Write
Reception & shift operation
Data reception (8-bit length)
Receive data 2
Dummy data
Read
Receive data 2
Write
Data reception (8-bit length)
Reception & shift operation
Receive data 3
Dummy data
Receive data 3
Read
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