UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 437

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(a) Timer mode register m (TMRm)
(b) Other registers
TMRm
Figure 7-48. Example of Set Contents of Registers When Interrupt Signal Thinning Function
Remark n = 00
CKSm
TOE0:TOEm
TO0:TOm
TOM0:TOMm
TOT0:TOTm
TOL0:TOLm
TDE0:TDEm
TRE0:TREm
TRO0:TROm
TRC0:TRCm
TME0:TMEm
15
0
Operation clock selection
0: Selects CK00 as operation clock of channel m.
14
0
m = 01
CCS1m
13
1
CCS0m
0: Stops the TOm output operation by counting operation.
0: Outputs a low level from TOm.
0: Sets 0 when TOEm = 0 (stops the TOm operation by counting operation).
0: Sets 0 when TOMm = 0 (master channel output mode).
0: Sets 0 when TOMm = 0 (master channel output mode).
0: Stops dead time control.
0: Stops real-time output.
0: Sets 0 when TREm = 0 (stops real-time output).
0: Does not operate as the real-time output trigger generation channel.
0: Stops modulated output.
12
1
CHAPTER 7 INVERTER CONTROL FUNCTIONS
Count clock selection
TERm
MAS
11B: Selects INTTMn of master channel.
11
0
STSm2
Slave/master selection
0: Slave channel
10
0
User’s Manual U19678EJ1V1UD
(Slave Channel) Is Used
STSm1
0
9
STSm0
Start trigger selection
000B: Selects only software start.
0
8
CISm1
0
7
CISm0
6
0
Operation mode of channel m
Selection of TIm pin input edge
0011B: Event count mode
00B: Sets 00B because these are not used.
5
0
MDm4
4
0
Setting of operation when
counting is started
0: Does not generate INTTMm
MDm3
3
0
when counting is started.
MDm2
1
2
MDm1
1
1
MDm0
0
0
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