UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 145

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UPD78F1233GB-GAH-AX

Manufacturer Part Number
UPD78F1233GB-GAH-AX
Description
MCU 16BIT 78K0R/LX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1233GB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1233GB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
3.4.8 Based indexed addressing
[Function]
[Operand format]
Based indexed addressing uses the contents of a register pair specified with the instruction word as the base
address, and the content of the B register or C register similarly specified with the instruction word as offset
address. The sum of these values is used to specify the target address.
Identifier
[HL+B], [HL+C] (only the space from F0000H to FFFFFH is specifiable)
ES:[HL+B], ES:[HL+C] (higher 4-bit addresses are specified by the ES register)
OP code
OP code
Figure 3-37. Example of ES:[HL+B], ES:[HL+C]
Figure 3-36. Example of [HL+B], [HL+C]
CHAPTER 3 CPU ARCHITECTURE
ES
rp (HL)
r (B/C)
User’s Manual U19678EJ1V1UD
rp (HL)
r (B/C)
Description
Target memory
Target memory
Memory
Memory
FFFFFH
F0000H
FFFFFH
00000H
143

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