UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 951

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Address: 000C0H/010C0H
Address: 000C1H/010C1H
Address: 000C2H/010C2H
Notes 1.
Caution The watchdog timer continues its operation during self-programming of the flash memory and
Remark f
Note Be sure to set FFH to 000C1H, as these addresses are reserved areas. Also set FFH to 010C1H when the
Note Be sure to set FFH to 000C2H, as these addresses are reserved areas. Also set FFH to 010C2H when the
boot swap operation is used because 000C1H is replaced by 010C1H.
boot swap operation is used because 000C2H is replaced by 010C2H.
2.
EEPROM emulation. During processing, the interrupt acknowledge time is delayed. Set the
overflow time and window size taking this delay into consideration.
WDSTBYON
IL
Set the same value as 000C0H to 010C0H when the boot swap operation is used because 000C0H is
replaced by 010C0H.
The window open period is 100% when WDSTBYON = 0, regardless the value of WINDOW1 and
WINDOW0.
WDTINIT
: Internal low-speed oscillation clock frequency
7
0
1
7
1
7
1
Figure 23-1. Format of User Option Byte (000C0H/010C0H) (2/2)
Note 1
Note
Note
Counter operation stopped in HALT/STOP mode
Counter operation enabled in HALT/STOP mode
WINDOW1
Figure 23-2. Format of Option Byte (000C1H/010C1H)
Figure 23-3. Format of Option Byte (000C2H/010C2H)
6
6
1
6
1
WINDOW0
Operation control of watchdog timer counter (HALT/STOP mode)
CHAPTER 23 OPTION BYTE
5
5
1
5
1
User’s Manual U19678EJ1V1UD
WDTON
4
4
1
4
1
WDCS2
Note 2
3
3
1
3
1
WDCS1
2
2
1
2
1
WDCS0
1
1
1
1
1
WDSTBYON
0
0
1
0
1
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