UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 734

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.7 Operation of Simplified I
(SCL) and serial data (SDA). This communication function is designed to execute single communication with devices
such as EEPROM, flash memory, and A/D converter, and therefore, can be used only by the master.
stop conditions are observed.
732
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
Make sure by using software, as well as operating the control registers, that the AC specifications of the start and
[Data transmission/reception]
[Interrupt function]
[Error detection flag]
* [Functions not supported by simplified I
Note When receiving the last data, ACK will not be output if 0 is written to the SOE02 (SOE0 register) bit and
The channel supporting simplified I
Simplified I
• Address field transmission
• Data transmission
• Data reception
• Stop condition generation
Note
• Master transmission, master reception (only master function with a single master)
• ACK output function
• Data length of 8 bits
• Manual generation of start condition and stop condition
• Transfer end interrupt
• Overrun error
• Parity error (ACK error)
• Slave transmission, slave reception
• Arbitration loss detection function
• Wait detection function
0
1
2
3
Channel
(When an address is transmitted, the address is specified by the higher 7 bits, and the least significant bit is
used for R/W control.)
serial communication data output is stopped. See the processing flow in 13.7.3 (2) for details.
2
CSI00 and CSI01 are only available in the 44-pin and 48-pin products of the 78K0R/IC3 and in the
78K0R/ID3 and 78K0R/IE3.
C (IIC10) performs the following four types of communication operations.
Used as CSI
Note
CSI00
CSI01
CSI10
and ACK detection function
2
−
C (IIC10) Communication
(See 13.7.1.)
(See 13.7.2.)
(See 13.7.3.)
(See 13.7.4.)
Note
Note
2
C (IIC10) is channel 2 of SAU.
CHAPTER 13 SERIAL ARRAY UNIT
2
C]
User’s Manual U19678EJ1V1UD
UART0 (supporting LIN-bus)
Used as UART
UART1
Used as Simplified I
IIC10
−
−
−
2
C