UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 397

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(a) Timer mode register n (TMRn) of real-time output trigger generation channel (TRCn = 1)
(b) Other registers of real-time output trigger generation channel (TRCn = 1)
TMRn
Note
Remark n = 01 to 10 (78K0R/IB3: n = 01 to 07)
CKSn
1/0
TOE0:TOEn
TO0:TOn
TOM0:TOMn
TOT0:TOTn
TOL0:TOLn
TDE0:TDEn
TRE0:TREn
TRO0:TROn
TRC0:TRCn
TME0:TMEn
15
Operation clock selection
0: Selects CK00 (channels 0 to 7) or CK02 (channels 8 to 11) as operation clock of channel n.
1: Selects CK01 (channels 0 to 7) or CK03 (channels 8 to 11) as operation clock of channel n.
14
Figure 7-21. Example of Set Contents of Registers During Operation as
0
If a software trigger is selected by using the STSn0 to STSn2 bits, set the MDn0 bit to 1.
CCS1n
13
0
CCS0n
0: Stops the TOn output operation by counting operation.
1: Enables the TOn output operation by counting operation.
0: Outputs a low level from TOn.
1: Outputs a high level from TOn.
0: Master channel output mode.
0: Sets 0 when TOMn = 0 (master channel output mode).
0: Sets 0 when TOMn = 0 (master channel output mode).
0: Stops dead time control.
0: Stops real-time output.
1: Enables real-time output.
0: Outputs a low level as real-time output.
1: Outputs a high level as real-time output.
1: Operates as the real-time output trigger generation channel.
0: Stops modulated output.
12
0
CHAPTER 7 INVERTER CONTROL FUNCTIONS
Real-Time Output Function (Type 2) (1/2)
Count clock selection
TERn
MAS
00B: Selects operation clock.
11
0
Slave/master selection
STSn2
0: Independent channel operation function
10
0
User’s Manual U19678EJ1V1UD
STSn1
9
0
trigger selection
STSn0
000B: Selects software trigger.
001B: Selects valid edge of TIn pin input.
1
8
CISn1
1/0
7
CISn0
1/0
6
Selection of TIn pin input edge
00B: Falling edge detection
01B: Rising edge detection
10B: Both-edge detection
11B: Setting prohibited
Operation mode of channel n
0010B: Capture mode
0
5
MDn4
0
4
Setting of operation when
counting is started
0: Neither generates INTTMn
1: Generates INTTMn and
MDn3
3
0
nor inverts timer output
when counting is started.
inverts timer output when
counting is started.
MDn2
2
1
MDn1
1
0
Note
MDn0
1/0
0
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