UPD78F1233GB-GAH-AX Renesas Electronics America, UPD78F1233GB-GAH-AX Datasheet - Page 904

• Manufacturer Part Number: UPD78F1233GB-GAH-AX
• Description: MCU 16BIT 78K0R/LX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1233GB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remarks 1.
902
Item
System clock
CPU
Flash memory
RAM
Port (latch)
Timer array unit TAUS
Inverter control function
Real-time counter (RTC)
Watchdog timer
Clock output/buzzer output
A/D converter
Programmable gain amplifier
Comparator
Serial array unit (SAU)
Serial interface (IICA)
Multiplier/divider
DMA controller
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
IL
2.
HALT Mode Setting
f
f
f
f
f
f
The functions mounted depend on the product.
Functions.
IH
IH40
X
EX
XT
IL
f
f
f
f
IH
X
EX
XT
, f
IH40
: Internal high-speed oscillation clock
: 40 MHz internal high-speed oscillation clock
: X1 clock
: External main system clock
: XT1 clock
:Internal low-speed oscillation clock
Table 18-1. Operating Statuses in HALT Mode (2/2)
Clock supply to the CPU is stopped
Status before HALT mode was set is retained
Operation continues (cannot be stopped)
Set by bits 0 (WDSTBYON) and 4 (WTON) of option byte (000C0H)
• WTON = 0: Stops
• WTON = 1 and WDSTBYON = 1: Oscillates
• WTON = 1 and WDSTBYON = 0: Stops
Operation stopped
Operation stopped (wait state in low-current consumption mode)
The value is retained
Status before HALT mode was set is retained
Operable
Set by bits 0 (WDSTBYON) and 4 (WTON) of option byte (000C0H)
• WTON = 0: Stops
• WTON = 1 and WDSTBYON = 1: Operates
• WTON = 1 and WDSTBYON = 0: Stops
Operable
Cannot operate
Operable
Cannot operate
Operable
When HALT Instruction Is Executed While CPU Is Operating on Subsystem Clock
CHAPTER 18 STANDBY FUNCTION
User’s Manual U19678EJ1V1UD
When CPU Is Operating on XT1 Clock (f
See 1.6
Block Diagram and 1.7
XT
)
Outline of