HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 1000

• Manufacturer Part Number: HD64F2318VTE25
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2318VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Registers
TSR3—Timer Status Register 3
Rev.7.00 Feb. 14, 2007 page 966 of 1108
REJ09B0089-0700
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
:
:
:
⎯
⎯
7
1
⎯
⎯
6
1
⎯
⎯
5
0
Overflow Flag
R/(W)*
TCFV
0
1
4
0
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
R/(W)*
Input Capture/Output Compare Flag D
TGFD
0
1
3
0
[Setting conditions]
• When TCNT = TGRD while TGRD is functioning as output compare register
• When TCNT value is transferred to TGRD by input capture signal while
[Clearing conditions]
• When DTC is activated by TGID interrupt while DISEL bit of MRB in DTC
• When 0 is written to TGFD after reading TGFD = 1
Input Capture/Output Compare Flag C
TGRD is functioning as input capture register
is 0
0
1
R/(W)*
TGFC
2
0
[Clearing conditions]
• When DTC is activated by TGIC interrupt while DISEL bit of MRB in
• When 0 is written to TGFC after reading TGFC = 1
[Setting conditions]
• When TCNT = TGRC while TGRC is functioning as output compare
• When TCNT value is transferred to TGRC by input capture signal
DTC is 0
register
while TGRC is functioning as input capture register
R/(W)*
Input Capture/Output Compare Flag B
TGFB
0
1 [Setting conditions]
1
0
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL bit
• When 0 is written to TGFB after reading TGFB = 1
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
of MRB in DTC is 0
output compare register
capture signal while TGRB is functioning as input capture
register
R/(W)*
Input Capture/Output Compare Flag A
TGFA
0
1
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt while
• When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
• When TCNT=TGRA while TGRA is function-
• When TCNT value is transferred to TGRA by
DISEL bit of MRB in DTC is 0
ing as output compare register
input capture signal while TGRA is functioning as
input capture register
H'FE85
TPU3