HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 29

IC H8S MCU FLASH 256K 100-QFP

HD64F2318VTE25

Manufacturer Part Number
HD64F2318VTE25
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of HD64F2318VTE25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
17.12 Flash Memory Programming and Erasing Precautions ..................................................... 623
17.13 Overview of Flash Memory (H8S/2319 F-ZTAT)............................................................ 629
17.14 Register Descriptions ........................................................................................................ 639
17.15 On-Board Programming Modes........................................................................................ 649
17.16 Programming/Erasing Flash Memory ............................................................................... 656
17.11.1 Progremmer Mode Setting ................................................................................... 608
17.11.2 Socket Adapters and Memory Map...................................................................... 609
17.11.3 Programmer Mode Operation .............................................................................. 611
17.11.4 Memory Read Mode ............................................................................................ 613
17.11.5 Auto-Program Mode ............................................................................................ 616
17.11.6 Auto-Erase Mode ................................................................................................. 618
17.11.7 Status Read Mode ................................................................................................ 620
17.11.8 Status Polling ....................................................................................................... 621
17.11.9 Programmer Mode Transition Time..................................................................... 622
17.11.10 Notes on Memory Programming........................................................................ 623
17.13.1 Features................................................................................................................ 629
17.13.2 Overview.............................................................................................................. 630
17.13.3 Flash Memory Operating Modes ......................................................................... 631
17.13.4 On-Board Programming Modes........................................................................... 632
17.13.5 Flash Memory Emulation in RAM ...................................................................... 634
17.13.6 Differences between Boot Mode and User Program Mode ................................. 635
17.13.7 Block Configuration............................................................................................. 636
17.13.8 Pin Configuration................................................................................................. 637
17.13.9 Register Configuration......................................................................................... 638
17.14.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 639
17.14.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 642
17.14.3 Erase Block Register 1 (EBR1) ........................................................................... 645
17.14.4 Erase Block Register 2 (EBR2) ........................................................................... 646
17.14.5 System Control Register 2 (SYSCR2) ................................................................. 647
17.14.6 RAM Emulation Register (RAMER)................................................................... 647
17.15.1 Boot Mode ........................................................................................................... 650
17.15.2 User Program Mode............................................................................................. 654
17.16.1 Program Mode (n = 1 for addresses H'000000 to H'03FFFF,
17.16.2 Program-Verify Mode (n = 1 for addresses H'000000 to H'03FFFF,
17.16.3 Erase Mode (n = 1 for addresses H'000000 to H'03FFFF,
17.16.4 Erase-Verify Mode (n = 1 for addresses H'000000 to H'03FFFF,
and n = 2 for addresses H'040000 to H'07FFFF) ................................................. 656
and n = 2 for addresses H'040000 to H'07FFFF) ................................................. 657
and n = 2 for addresses H'040000 to H'07FFFF) ................................................. 659
and n = 2 for addresses H'040000 to H'07FFFF) ................................................. 660
Rev.7.00 Feb. 14, 2007 page xxvii of xxxii
REJ09B0089-0700

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