HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 728

• Manufacturer Part Number: HD64F2318VTE25
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2318VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 17 ROM
2. Download of on-chip program
3. Initialization of programming/erasing
4. Programming/erasing execution
5. When programming/erasing is executed consecutively
Rev.7.00 Feb. 14, 2007 page 694 of 1108
REJ09B0089-0700
The on-chip program is automatically downloaded by setting the SCO bit in the flash key code
register (FKEY) and the flash code control and status register (FCCS), which are
programming/erasing interface registers.
The user MAT is replaced to the embedded program storage area when downloading. Since the
flash memory cannot be read when programming/erasing, the procedure program, which is
working from download to completion of programming/erasing, must be executed in a space
other than the flash memory to be programmed/erased (for example, on-chip RAM).
Since the result of download is returned to the programming/erasing interface parameters,
whether the normal download is executed or not can be confirmed.
The operating frequency is set before execution of programming/erasing. This setting is
performed by using the programming/erasing interface parameters.
To program or erase, the FLSHE bit in system control register 2 (SYSCR2) must be set to 1
and the user program mode must be entered.
The program data/programming destination address is specified in 128-byte units when
programming.
The block to be erased is specified in erase-block units when erasing.
These specifications are set by using the programming/erasing interface parameters and the on-
chip program is initiated. The on-chip program is executed by using the JSR or BSR
instruction to perform the subroutine call of the specified address in the on-chip RAM. The
execution result is returned to the programming/erasing interface parameters.
The area to be programmed must be erased in advance when programming flash memory.
All interrupts are prohibited during programming and erasing. Interrupts must not occur in the
user system.
When the processing is not ended by the 128-byte programming or one-block erasure, the
program address/data and erase-block number must be updated and consecutive
programming/erasing is required.