HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 1072

• Manufacturer Part Number: HD64F2318VTE25
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2318VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Registers
TCSR—Timer Control/Status Register
Rev.7.00 Feb. 14, 2007 page 1038 of 1108
REJ09B0089-0700
Bit
Initial value
Read/Write
Notes: 1. The method for writing to TCSR is different from that for general registers to prevent
2. Can only be written with 0 for flag clearing.
*1
accidental overwriting. For details, see section 11.2.4, Notes on Register Access.
:
:
:
R/(W)
Overflow Flag
OVF
7
0
0
1
*2
Timer Mode Select
Notes: 1. The WDTOVF pin function cannot be used in the F-ZTAT
[Clearing condition]
When 0 is written to OVF after reading OVF = 1
[Setting condition]
When TCNT overflows from H'FF to H'00 in interval timer mode
0
1
WT/IT
R/W
6
0
Interval timer mode: Sends the CPU an interval timer interrupt
request (WOVI) when TCNT overflows
Watchdog timer mode: Generates the WDTOVF signal
TCNT overflows
Timer Enable
2. For details of the case where TCNT overflows in watchdog
0
1
versions.
timer mode, see section 11.2.3, Reset Control/Status Register
(RSTCSR).
Note: * The overflow period is the time from when TCNT
TME
TCNT is initialized to H'00 and halted
TCNT counts
Clock Select
R/W
CKS2 CKS1 CKS0
5
0
0
1
H'FFBC (W), H'FFBC (R)
starts counting up from H'00 until overflow occurs.
*2
0
1
0
1
⎯
⎯
4
1
0
1
0
1
0
1
0
1
⎯
⎯
3
1
φ/2
φ/64
φ/128
φ/512
φ/2048
φ/8192
φ/32768
φ/131072
Clock
CKS2
R/W
2
0
CKS1
(when φ = 20 MHz)
R/W
25.6 μs
819.2 μs
1.6 ms
6.6 ms
26.2 ms
104.9 ms
419.4 ms
1.68s
Overflow period*
1
0
*1
CKS0
when
R/W
0
0
WDT