HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 386
HD64F2318VTE25
Manufacturer Part Number
HD64F2318VTE25
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of HD64F2318VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Section 9 16-Bit Timer Pulse Unit (TPU)
• When TGR is an input capture register
Example of Buffer Operation Setting Procedure: Figure 9.18 shows an example of the buffer
operation setting procedure.
Rev.7.00 Feb. 14, 2007 page 352 of 1108
REJ09B0089-0700
Input capture
signal
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 9.17.
Buffer register
Select TGR function
Set buffer operation
<Buffer operation>
Buffer operation
Start count
Figure 9.18 Example of Buffer Operation Setting Procedure
Figure 9.17 Input Capture Buffer Operation
[1]
[2]
[3]
Timer general
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 to start the count
register
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
TCNT
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