HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 479

• Manufacturer Part Number: HD64F2318VTE25
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2318VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

12.2.7
Note: * Only 0 can be written, to clear the flag.
SSR is an 8-bit register containing status flags that indicate the operating status of the SCI, and
multiprocessor bits.
SSR can be read or written to by the CPU at all times. However, 1 cannot be written to flags
TDRE, RDRF, ORER, PER, and FER. Also note that in order to clear these flags they must be
read as 1 beforehand. The TEND flag and MPB flag are read-only flags and cannot be modified.
SSR is initialized to H'84 by a reset, and in standby mode or module stop mode.
Bit 7—Transmit Data Register Empty (TDRE): Indicates that data has been transferred from
TDR to TSR and the next serial data can be written to TDR.
Bit 7
TDRE
0
1
Bit
Initial value :
R/W
Serial Status Register (SSR)
Description
[Clearing conditions]
•
•
[Setting conditions]
•
•
:
:
When 0 is written to TDRE after reading TDRE = 1
When the DTC is activated by a TXI interrupt and writes data to TDR
When the TE bit in SCR is 0
When data is transferred from TDR to TSR and data can be written to TDR
R/(W) *
TDRE
7
1
R/(W) *
RDRF
6
0
R/(W) *
ORER
5
0
R/(W) *
Section 12 Serial Communication Interface (SCI)
FER
4
0
Rev.7.00 Feb. 14, 2007 page 445 of 1108
R/(W) *
PER
3
0
TEND
R
2
1
REJ09B0089-0700
MPB
R
1
0
(Initial value)
MPBT
R/W
0
0