HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 1035

• Manufacturer Part Number: HD64F2318VTE25
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2318VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

PFCR1—Port Function Control Register 1
CS17 select
Notes: 1. Valid in modes 4 to 6.
0
1
Bit
Initial value
Read/Write
CS36 select
PG3 is PG3/CS1 pin. CS1 output is enabled when CS167E = 1 and PG3DDR = 1
PG3 is PG3/CS7 pin. CS7 output is enabled when CS167E = 1 and PG3DDR = 1
0
1
2. Clear PG3DDR to 0 before changing the CSS17 bit setting.
3. Clear PG1DDR to 0 before changing the CSS36 bit setting.
PG1 is PG1/IRQ7/CS3 pin. CS3 output is enabled when when CS25E = 1 and PG1DDR = 1
PG1 is PG1/IRQ7/CS6 pin. CS6 output is enabled when CS167E = 1 and PG1DDR = 1
*1 *2
:
:
:
Port F1 chip select 5 select
*1 *3
0
1
CSS17
PF1 is PF1/BACK/IRQ1 pin
PF1 is PF1/BACK/IRQ1/CS5 pin. CS5 output is enabled when BRLE = 0,
CS25E = 1, and PF1DDR = 1
R/W
7
0
Port F0 chip select 4 select
0
1
PF0 is PF0/BREQ/IRQ0 pin
PF0 is PF0/BREQ/IRQ0/CS4 pin. CS4 output is enabled when
BRLE = 0, CS25E = 1, and PF0DDR = 1
CSS36
R/W
6
0
Address 23 Output Enable
0
1
PF1CS5S
R/W
*1
5
0
P13DR is output when P13DDR = 1
A23 is output when P13DDR = 1
Address 22 Output Enable
0
1
P12DR is output when P12DDR = 1
A22 is output when P12DDR = 1
PF0CS4S
*1
R/W
Address 21 Output Enable
4
0
0
1
Rev.7.00 Feb. 14, 2007 page 1001 of 1108
P11DR is output when P11DDR = 1
A21 is output when P11DDR = 1
Address 20 Output Enable
0
1
A23E
H'FF45
R/W
P10DR is output when P10DDR = 1
A20 is output when P10DDR = 1
3
1
*1
Appendix B Internal I/O Registers
A22E
*1
R/W
2
1
*1
A21E
R/W
1
1
*1
REJ09B0089-0700
A20E
R/W
0
1
Port