HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 295

• Manufacturer Part Number: HD64F2318VTE25
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2318VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Port B Data Register (PBDR)
PBDR is an 8-bit readable/writable register that stores output data for the port B pins (PB7 to
PB0). PBDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior
state in software standby mode.
Port B Register (PORTB)
Note: * Determined by state of pins PB7 to PB0.
PORTB is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port B pins (PB7 to PB0) must always be performed on PBDR.
If a port B read is performed while PBDDR bits are set to 1, the PBDR values are read. If a port B
read is performed while PBDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTB contents are determined by the pin states, as
PBDDR and PBDR are initialized. PORTB retains its prior state in software standby mode.
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
PB7DR
R/W
PB7
— *
R
7
0
7
PB6DR
R/W
PB6
— *
R
6
0
6
PB5DR
R/W
PB5
— *
R
5
0
5
PB4DR
R/W
PB4
— *
R
4
0
4
Rev.7.00 Feb. 14, 2007 page 261 of 1108
PB3DR
R/W
PB3
— *
R
3
0
3
PB2DR
R/W
PB2
— *
R
2
0
2
Section 8 I/O Ports
PB1DR
REJ09B0089-0700
R/W
PB1
— *
R
1
0
1
PB0DR
R/W
PB0
— *
R
0
0
0