HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 58

IC H8S MCU FLASH 256K 100-QFP

HD64F2318VTE25

Manufacturer Part Number
HD64F2318VTE25
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of HD64F2318VTE25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Section 1 Overview
Type
I/O ports
Rev.7.00 Feb. 14, 2007 page 24 of 1108
REJ09B0089-0700
Symbol
P17 to
P10
P27 to
P20
P35 to
P30
P47 to
P40
PA3 to
PA0
PB7 to
PB0
PC7 to
PC0
PD7 to
PD0
PE7 to
PE0
TFP-100B,
TFP-100G FP-100A TLP-113V
6 to 1, 100,
99
92 to 89,
59,
56 to 54
13 to 8
86 to 79
53 to 50
48 to 41
39 to 32
30 to 23
22 to 19, 17
to 14
8 to 1
94 to 91,
61,
58 to 56
15 to 10
88 to 81
55 to 52
50 to 43
41 to 34
32 to 25
24 to 21,
19 to 16
Pin No.
D3, C2, D1,
C4, C1, B1,
A2, B2
B6, A5, D5,
D6, G11,
J10, H11,
J8
F4, F1, E2,
E3, E4, E1
D7, C7, A7,
B8, C8, B9,
A8, D9
J11, L11,
K11, L10
K9, J9, K8,
K7, L8, J7,
J6, K6
H7, H6, L6,
K5, J5, H5,
L5, K4
L4, H3, L3,
L1, L2, K1,
K2, J2
J3, H4, G2,
H1, F3, F2,
G1, G4
I/O
I/O
I/O
I/O
Input
I/O
I/O
I/O
I/O
I/O
Name and Function
Port 1: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port 1 data direction
register (P1DDR).
Port 2: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port 2 data direction
register (P2DDR).
Port 3: A 6-bit I/O port. Input or output
can be designated for each bit by
means of the port 3 data direction
register (P3DDR).
Port 4: An 8-bit input port.
Port A *
output can be designated for each bit
by means of the port A data direction
register (PADDR).
Port B *
output can be designated for each bit
by means of the port B data direction
register (PBDDR).
Port C *
output can be designated for each bit
by means of the port C data direction
register (PCDDR).
Port D *
output can be designated for each bit
by means of the port D data direction
register (PDDDR).
Port E: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port E data direction
register (PEDDR).
7
7
7
7
: A 4-bit I/O port. Input or
: An 8-bit I/O port. Input or
: An 8-bit I/O port. Input or
: An 8-bit I/O port. Input or

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