HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 743

• Manufacturer Part Number: HD64F2318VTE25
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2318VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

(3) Programming Execution
When flash memory is programmed, the programming destination address on the user MAT must
be passed to the programming program in which the program data is downloaded.
1. The start address of the programming destination on the user MAT is set in general register
2. The program data for the user MAT must be prepared in the consecutive area. The program
For details on the programming procedure, see section 17.24.2, User Program Mode.
ER1 of the CPU. This parameter is called FMPAR (flash multipurpose address area
parameter).
Since the program data is always in 128-byte units, the lower eight bits (A7 to A0) must be
H'00 or H'80 as the boundary of the programming start address on the user MAT.
data must be in the consecutive space which can be accessed by using the MOV.B instruction
of the CPU and is not the flash memory space.
When data to be programmed does not satisfy 128 bytes, the 128-byte program data must be
prepared by embedding the dummy code (H'FF).
The start address of the area in which the prepared program data is stored must be set in
general register ER0. This parameter is called FMPDR (flash multipurpose data destination
area parameter).
Rev.7.00 Feb. 14, 2007 page 709 of 1108
REJ09B0089-0700
Section 17 ROM