HD64F2318VTE25 Renesas Electronics America, HD64F2318VTE25 Datasheet - Page 55

• Manufacturer Part Number: HD64F2318VTE25
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2318VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Type
Interrupts
Address
bus
Data bus
Bus control
Symbol
NMI
IRQ7 to
IRQ0
A23 to
A0
D15 to
D0
CS7 to
CS0
AS
RD
HWR
LWR
TFP-100B,
TFP-100G FP-100A TLP-113V
63
94, 93,
13, 12,
73 to 76
2, 1,
100, 99, 53
to 50, 48 to
41, 39 to 32
30 to 19, 17
to 14
94 to 97
75, 76
70
71
72
73
65
96, 95,
15, 14,
75 to 78
4 to 1,
55 to 52,
50 to 43,
41 to 34
32 to 21,
19 to 16
96 to 99
77, 78
72
73
74
75
Pin No.
C5, C6, F4,
F1, C10,
B10, B11,
A10
C1, B1, A2,
B2, J11,
L11, K11,
L10, K9,
J9, K8, K7,
L8, J7, J6,
K6, H7, H6,
L6, K5, J5,
H5, L5, K4
L4, H3, L3,
L1, L2, K1,
K2, J2, J3,
H4, G2,
H1, F3, F2,
G1, G4
A3, C5,
B11, A10,
A4, B4
E10
D8
C11
C10
F8
I/O
Input
Input
Output Address bus: These pins output an
I/O
Output Chip select: Signals for selecting
Output Address strobe: When this pin is low, it
Output Read: When this pin is low, it indicates
Output High write: A strobe signal that writes
Output Low write: A strobe signal that writes
Rev.7.00 Feb. 14, 2007 page 21 of 1108
Name and Function
Nonmaskable interrupt: Requests a
nonmaskable interrupt. When this pin
is not used, it should be fixed high.
Interrupt request 7 to 0: These pins
request a maskable interrupt.
address.
Data bus: These pins constitute a
bidirectional data bus.
areas 7 to 0.
indicates that address output on the
address bus is enabled.
that the external address space can
be read.
to external space and indicates that
the upper half (D15 to D8) of the data
bus is enabled.
to external space and indicates that
the lower half (D7 to D0) of the data
bus is enabled.
Section 1 Overview
REJ09B0089-0700