L64105 LSI Logic Corporation, L64105 Datasheet - Page 101

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Figure 4.19
Figure 4.20
7
7
Register 66 (0x042) User Data FIFO Output [7:0]
Register 67 (0x043) Aux Data FIFO Output [7:0]
User Data Layer ID [1:0]
Reserved
User data can be read out by the host one byte at a time through this
read port. When a byte is read, the next byte in the FIFO is loaded into
the register. See also Register 65.
Auxiliary data can be read out by the host microprocessor one byte at a
time through this read port. When a byte is read, the next byte in the
FIFO is loaded into the register. See also Register 64.
Video Decoder Registers
User Data FIFO Output [7:0]
Aux Data FIFO Output [7:0]
The User Data Layer ID bits indicate the layer origin of
the user data or extra data at the current User Data FIFO
output. Reading the ID does NOT change the FIFO
status. The host should always read this layer ID register
before reading the FIGO output register. The IDs for the
four layers are defined in the following table.
Bits
0b00
0b01
0b10
0b11
Clear these bits when writing to this register.
Read Only
Read Only
Layer
Sequence
Group of pictures
Picture
Slice
R [3:2]
0
0
[7:4]
4-19