L64105 LSI Logic Corporation, L64105 Datasheet - Page 43
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L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
- Current page: 43 of 454
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3.1 Summary by Register
Chapter 3
Register Summary
Communication with the L64105 Decoder is through 512, 8-bit registers.
The registers are named by their decimal address, 0 to 511. They are
organized into the eight groups listed in
and bits in each group are further detailed in
To find a register, field, or bit, use
the summary table for the group. Then use the summary table to find the
page in
If you know the name of a field or bit, use the alphabetic index starting
on
Table 3.1
Register
Number
0–63
64–191
192–223
224–255
256–335
336–383
384–415
page 3-31
Chapter 4
Register Group
Host Interface Registers
Video Decoder Registers
Memory Interface Registers
Microcontroller Registers
Video Interface Registers
Audio Decoder Registers
RAM Test Registers
L64105 Register Groupings
to find the page number on which it is described.
on which the register is described.
Table 3.1
Table
Number
to find the starting page of
Table 3.2
Table
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.1. The registers, fields,
Reference
through
Page
3-14
3-17
3-20
3-24
3-27
3-2
3-7
Table
3.8.
3-1
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