L64105 LSI Logic Corporation, L64105 Datasheet - Page 363

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Figure 10.14 IEC958 Syntax
Subframe
Table 10.10 IEC958 Subframe Preambles
Note:
M
Preamble
Format
V = Validity bit (set to 1).
U = User data (set to 0).
C = Channel status.
P = Parity bit.
W
M
B
Ch1
Frame 191
0
Preamble
W
Sync
Preamble State = 0
Ch2
3
Preceding
11101000
11100010
11100100
The layout of the subframes is also shown in
subframe starts off with a 4-bit (8-state) preamble. The preamble is
coded to mark the first frame in a block, to differentiate between
subframes in a frame, and to violate the biphase mark rule twice. This
latter feature prevents other data in the stream from mimicking a
preamble. The preamble states are listed in
biphase mark violations do not occur between data and the preamble,
two codes are used for each of the three subframe applications
depending on the last state of the previous data bit.
Bits 4 through 11 of the subframes are fixed at zero by the S/P DIF
Interface. The 16-bit audio sample is packed in bits 12 through 27 of the
subframe with the LSB in bit 12. The interface defaults to setting the
V bits and clearing the U bits. The host can change their values each
subframe by writing to the User and Valid bits in Register 363
(page
S/P DIF Interface
4
B
Subframe 1 Subframe 2
Fixed to 0
4-85). The P bit is set for even parity across the subframe.
Ch1
Frame 0
Preamble State = 1 Subframe
W
11
12
Preceding
00010111
00011101
00011011
LSB
Ch2
M
Ch1
Frame 1
16-bit Audio Sample
Subframe 1 at the start of blocks
Subframe 1 except at the start of blocks
Subframe 2
W
Ch2
Table
Figure
M
10.10. Since the
Ch1
10.14. Each
MSB
27 28
W
V U C P
Ch2
31
10-31