L64105 LSI Logic Corporation, L64105 Datasheet - Page 303
![no-image](/images/no-image-200.jpg)
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
- Current page: 303 of 454
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Figure 9.6
PEL State
SYSCLK
HCNT
HS
Horizontal Input Timing
Cb
0
The horizontal start column refers to the left edge of the display area. A
start column and end column must be programmed for main video. Only
a start column needs to be programmed for SAV and EAV codes. The
L64105 should be programmed such that each start column coincides
with a Cb pel state. The Pixel State Reset Value, Register 284
(page
timing systems, the horizontal start columns are modulo 4, and an
adjustment to the Pixel State Reset Value is not required. For NTSC and
PAL systems, the Main Start Column values are typically 244 and 264
respectively. Use the following formula to determine the correct value for
the Initial Pixel State.
The general form for calculating the end column is:
For NTSC and PAL systems, the end column values are typically 1683
and 1703, respectively.
NTSC system.
Display Areas
Y
1
4-67), is programmable to ensure proper alignment. For most
Cr
2
End Col
Pixel State Reset Value
Ys
3
=
Start Col
Figure 9.7
Cb
4
+
Picture Width 2
=
shows the horizontal timing for an
Main Start Col
Horizontal Start Column
244
Cb
–
245
Y
+
1
2
mod4
246
Cr
9-11
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