L64105 LSI Logic Corporation, L64105 Datasheet - Page 195

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L64105

Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
Figure 5.10 Block Move Flowchart
SDRAM Access
Write DMA SDRAM Source Address
Write DMA SDRAM Target Address
SDRAM Controller Moves One
Word at a Time, Incrementing
Addresses and Decrementing
193[2:1] = 0b11 Block Move
Chip Automatically Returns
Write Block Transfer Count
202 = [7:0] / 203 = [15:8]
218[0:2] = [18:16]
217 = [15:8]
216 = [7:0]
(LSB must be set last)
215[0:2] = [18:16]
214 = [15:8]
213 = [7:0]
(LSB must be set last)
Block Transfer Count
193[2:1] = 0b00 Idle
to DMA Idle Mode.
193[2:1] = 0b00
Set DMA Mode
Set DMA Mode
Transfer Done
Yes
Interrupt?
SDRAM
Begin
Done
No
5-19

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