L64105 LSI Logic Corporation, L64105 Datasheet - Page 141

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Reserved
OSD Palette Counter Zero Flag
Clear OSD Palette Counter
Display Override Mode [1:0]
Force Video Background [1:0]
Video Interface Registers
Clear this bit when writing to this register.
This bit is set to inform the host that the OSD Palette
Counter is cleared to zero. The host should check this bit
before starting to write the OSD Palette.
When this bit is set, the counter that controls access to
the OSD palette is cleared.
When this field is set to modes 0b01 and 0b10, the
display start address from the internal video decoder can
be overridden, i.e., controlled by the external host. In
these modes, the start address of the frame store from
which to display is taken from Registers 285 and 286 for
Luma
Chroma. The resolution of the start addresses is 64 bytes
of SDRAM data. When set to mode 0b00 (normal mode),
the start address of the display controller is supplied by
the internal video decoder.
Mode Bits
0b00
0b01
0b10
0b11
These bits control the background and allow the host to
set modes that can force the background to any color
according to the following table:
Mode Bits
0b00
0b01
0b10
0b11
(page
4-68) and Registers 287 and 288 for
Description
Normal Mode (no override)
Frame Mode
First Field Only
Reserved
Description
Normal
No Background (default)
Video Black
Video Blue/User programmed
Video on Blue
R/W [5:4]
R/W [7:6]
W 3
4-59
R 3
2