L64105 LSI Logic Corporation, L64105 Datasheet - Page 214

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

6.3.5 Preparsing a Program Stream
6-18
The only error that the Preparser can detect is a mismatch between the
packet length field and the next packet start code. If this occurs, the
Preparser generates an interrupt and optionally clears the buffers. For a
complete description of the MPEG-1 system stream syntax, the reader
is referred to ISO/IEC 11172 .
The registers for the Audio and Video ES Channel Buffers are those
described for Elementary Stream Mode.
associated with the System Channel Buffer.
The start and end addresses are the upper 16 bits for alignment on
256-bit boundaries. The host must read the LSB of the write pointer first
to get the next bytes of the pointer updated. There is no read pointer for
this buffer.
Table 6.11
Preparsing an MPEG-1 or 2 program stream is very similar to the MPEG-1
system stream case shown in
program stream is divided into packs and then packets, and the PES
packet header contains a header length field. The Preparser reads this
field to determine the number of header bytes to store in the Audio PES
Header/System Channel Buffer. The pack headers are also mapped into
the buffer in the same manner as for the system header in
Storing a pack header causes the chip to assert INTRn, if not masked, and
to set the Pack Data Ready Interrupt bit in Register 2
Channel Interface
Addresses
Audio PES Header/System Channel Buffer Start
Address
Audio PES Header/System Channel Buffer End
Address
Audio PES Header/System Channel Buffer Write
Address
Note:
These registers are also used for the Audio PES Header
Channel Buffer when the input stream is an A/V PES
stream from a transport demultiplexer.
SDRAM Addresses - Audio PES Header/System
Channel Buffer
Figure
6.8. The differences are that the
Table 6.11
88 and 89
90 and 91
Registers Page Ref.
114–116
lists the registers
(page
Figure
4-5).
4-25
4-25
4-29
6.9.