L64105 LSI Logic Corporation, L64105 Datasheet - Page 327

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

9.10.2 Bitstream Controlled Pan and Scan
9.10.3 Vertical Pan and Scan
Figure 9.17 Horizontal Pan and Scan Calculation
Note:
When operating under bitstream control, the horizontal pan and scan
offset values are automatically extracted from the bitstream and
converted for the Display Controller. The pan and scan offset values are
updated at the field boundary for precise control over the offset. The host
is still responsible for deriving the Horizontal Filter Scale value and the
Main Reads per Line value from the display information in the sequence
header written to the Aux Data FIFO.
The Display Controller supports vertical panning via host control at a
resolution of two lines/field or four lines/frame. The Vertical Pan and Scan
Line Offset is host programmable in Register 281
sampled at every new field time to allow for different offsets for each field.
The value programmed into Register 281 must be a positive value
representing the vertical pan and scan value in two field-line increments
from the top of the image.
Pan and Scan Operation
Reconstructed Image
hs = horizontal size extracted from sequence header.
hds = horizontal display size extracted from sequence display extension.
hor = horizontal picture offset extracted from picture display extension.
hps = horizontal pan and scan offset.
hps
Display Image
hps = (hs - hds)/2 - hor
hds
hs
hor
(page
4-66) and is
9-35