L64105 LSI Logic Corporation, L64105 Datasheet - Page 138

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Figure 4.80
Figure 4.81
4-56
Read
Write
7
Register 240 (0x0F0)
Register 241 (0x0F1)
7
Reserved
Host Next GOP/Seq Status
Host Search Next Gop/Seq Command
Reserved
Q Table Ready
Intra Q Table
Q Table Address [5:0]
Register Descriptions
Q Table Address [5:0]
Clear this bit when writing to this register.
Indicates the status of the bitstream search described for
the following command.
Setting this bit causes the decoder to skip bits in the
bitstream until it finds the next GOP or sequence header.
When it finds a GOP or sequence header, the L64105’s
microcontroller sets the Host Broken Link/Seq Status bit.
Clear these bits when writing to this register.
When set, this bit indicates that the Q table is ready to
be read by the host.
When set, this bit indicates that the Q table is an intra
table. When cleared, it indicates a nonintra Q table.
The host writes the address of the Q table entry to be
accessed in these six bits. See
Access of Q Table Entries.”
Reserved
Reserved
2
Section 8.2.8, “Host
Intra Q Table
1
1
GOP/Seq Status
Next GOP/Seq
Host Search
Command
Host Next
R/W [7:2]
Q Table
Ready
0
R/W 1
0
[7:1]
W 0
R 0
R 0
7