L64105 LSI Logic Corporation, L64105 Datasheet - Page 186

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

5.4 SDRAM Access
5.4.1 Host Reads/Writes
5-10
Note that, if an unmasked interrupt/status bit is still set at the time the
Clear Interrupt Pin bit is set, INTRn deasserts for 1 clock cycle and then
returns to its active state immediately, indicating pending events. The
host must read all of the interrupt/status registers prior to setting the
Clear Interrupt Pin bit.
This type of interrupt structure is designed for use in systems with
multiple interrupt priorities such that the interrupt routines can exit at any
point to service higher priority interrupts. As soon as all higher priority
interrupts are serviced and disabled, the L64105 becomes the next
highest priority as the interrupt pin can be left active. In this manner, the
interrupt hardware provides a mechanism to leave and return to the
interrupt service routine cleanly.
The SDRAM controller in the L64105 provides three methods of SDRAM
access by the host:
For host/SDRAM read/writes, the host loads a 19-bit address into the
Host SDRAM Target Address (Registers 196–198,
and the Host SDRAM Source Address (Registers 199–201,
for reads. These addresses are written as if they are the upper 19 bits
of a 21-bit SDRAM address. The most significant bit asserts either CS
or CS1 to select one of the SDRAM chips. The remaining bits are
converted to row and column addresses by the Memory Interface. Since
the internal data bus of the L64105 is 64 bits wide, the SDRAM is set up
to transfer a block of four, 16-bit words at each access. It does so by
setting the two least significant column address bits to 00 to start and
then incrementing them to transfer the four words.
The host has access to two 8-bit registers for SDRAM transfers, the Host
SDRAM Write Data register (Register 195,
SDRAM Read Data register (Register 194,
Host Interface
Host Read/Write
DMA Read/Write
SDRAM Block Move
page
page
4-41) and the Host
4-41). The host can
page
4-42) for writes
page
4-42)