L64105 LSI Logic Corporation, L64105 Datasheet - Page 350

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

10.5.3 Other Host Controls and Status
10.5.4 Sample Decimation for S/P DIF
10-18
The bitstream mute, emphasis, quantization, and sampling frequency
information is written to Register 352
audio_frm_num and num_of_audio_ch are written to Register 351. When
the mute bit in the audio packet is 1, PCM samples are muted by the
output DAC and S/P DIF interface.
The host can program the Audio Decoder Play Mode bits in Register 355
(page
play, or slow play mode. The current play mode is reported to the host
with the Audio Decoder Play Mode Status bits in Register 354
(page
The sampling frequency of input Linear PCM bitstream can be either
48 kHz or 96 kHz. Decoded Linear PCM samples are passed to the
audio DAC Interface which handles 48 kHz or 96 kHz and the S/P DIF
Interface which can only support up to 48 kHz. The Linear PCM module
has two output ports as shown in
nondecimated samples (48 or 96 kHz) and an S/P DIF port for decimated
samples (48 kHz).
When the Linear PCM input bitstream sample rate is at 48 kHz, the PCM
output is at 48 kHz and can be used for both the DAC interface and the
S/P DIF interface. The S/P DIF port of the Linear PCM module has no
output. When the Linear PCM input bitstream runs at 96 kHz, the PCM
output is at 96 kHz and the S/P DIF port is at 48 kHz. Either PCM
samples or S/P DIF samples can be used as inputs to DAC interface
depending upon which frequency is desired. The S/P DIF interface can
only use S/P DIF port samples.
Audio Decoder Module
4-79) to place the Linear PCM Decoder in normal play, pause, fast
4-78).
Figure
(page
10.6, a PCM port for
4-77) for the host. The