L64105 LSI Logic Corporation, L64105 Datasheet - Page 172

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Figure 4.132 Register 368 (0x170)
4-90
7
Host Pc Info
Reserved
Pd Data Valid
Reserved
Pd Selection[1:0]
Host Pc Info [2:0]
Register Descriptions
5
Clear this bit when writing to this register.
When the Pd Selection bits (3 and 4 in this register) are
0b10 (host force mode) and the host writes a Host Pd
Value to Registers 369 and 370, this bit is set. When the
internal MPEG Audio Formatter reads the existing Host
Pd Value, this bit is cleared. This provides the host a
means of detecting exactly when the previous data was
used and when it is safe to set the Host Pd Value for the
next IEC958 frame.
Clear this bit when writing to this register.
This value in this field (see the following table)
determines from where the MPEG Audio Formatter picks
up the value of the Pd parameter.
Bits [4:3]
0b00
0b01
0b10
0b11
The host writes the Pc info to be loaded into the MPEG
burst preamble Host Pc info field bits [10:8] into this field.
4
Pd Selection
Description
Previous audio packet
Base packet without extension
Host force
Reserved
3
Reserved
2
Pd Data Valid
1
R/W [4:3]
R/W [7:5]
Reserved
0
R 1
0
2