L64105 LSI Logic Corporation, L64105 Datasheet - Page 26

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

the L64105 address SDRAM as if it were 8-byte wide RAM. The address
converter changes these addresses to chip selects, bank selects, and
column and row addresses for the SDRAM.
The Video Decoder reads the MPEG video elementary stream from the
SDRAM buffer, performs postparsing on it, decompresses it, decodes it,
and stores it back in SDRAM. The postparser strips off all header
information and stores it in internal memory for use in the decoding
process. The postparser also strips auxiliary and user data from the
stream and stores it in FIFOs that can be read through registers by the
host. The decompressed and decoded video is stored back in SDRAM
in frame form.
The Video Interface reads the video frames from frame stores in
SDRAM, synchronizes them to the vertical and horizontal sync signals
from the NTSC/PAL Encoder, and mixes in On-Screen Display (OSD)
information. The interface performs letterboxing, 3:2 pulldown, and pan
and scan. It also handles trick modes such as pause, slow play, fast
forward, etc.
The Audio Decoder contains an MPEG (Musicam) Decoder, Linear PCM
Decoder, MPEG Formatter, Audio DAC Interface, and an S/P DIF
(IEC958) Interface. The decoders decompress and decode the audio
stream. The decoder outputs can be steered to the DAC or S/P DIF
Interface. The formatter converts the encoded and compressed streams
to S/P DIF format for the S/P DIF Interface. The host controls the mode
of the Audio Decoder; that is, it determines which decoder runs and
where its output goes, and which formatter runs. The host can also place
the Audio Decoder in the bypass mode and connect inputs from another
device directly to the L64105 audio outputs.
The microcontroller is shown on the block diagram since it controls most
of the processes of the L64105.
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Introduction