L64105 LSI Logic Corporation, L64105 Datasheet - Page 276
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
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8.4.3 Two-Frame Store Mode
8.4.4 Decode and Display Frame Store Status Indicators
8-34
Display modes 4 and 5 above use Chroma Field Repeat. To achieve
these modes, the chroma component of the B pictures should be
allocated a full frame store even though the luma component uses less
than a full frame store in RMM. Thus the chroma component effectively
does not use reduced memory mode if the display mode is set to 4 or 5.
Note that in this case, the number of segments programmed in Register
289 bits [6:1] indicate the number of segments used for luma.
If B pictures are not present in the bitstream, the decoder can be
operated in a two-frame store mode, i.e., SDRAM memory needs to be
allocated only to anchor frame stores A1 and A2. Note that, even if
Low_delay is set in the bitstream, the delay between decoding a picture
and displaying it is still three field display times.
The host has access to two registers that indicate which frame store is
currently being used for reconstruction and which is currently being used
for display. The coding for the Current Decode Frame bits [5:4] and the
Current Display Frame bits [3:2] in Register 238 is identical and is shown
in
Table 8.19
Video Decoder Module
Current
Decode/Display
Frame
0b00
0b01
0b10
0b11
Table
8.19.
Current Decode/Display Frame Bits Coding
Description
I/P Anchor 1 (A1)
I/P Anchor 2 (A2)
B (A3)
Reserved
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