L64105 LSI Logic Corporation, L64105 Datasheet - Page 306
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L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
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Figure 9.8 Luma and Chroma Frame Store Format
9-14
63
63
Cr14
Y15
Cr6
Y7
56
56
55
55
Cb14
Y14
Cb6
Y6
48
48
Table 9.4
First, the host must set up a display override frame store in SDRAM. This
is normally accomplished using the DMA features of the Host Interface
or by decoding a single frame sequence. The luma and chroma data
must reside in separate frame stores and be formatted as shown in
Figure
Video Interface
Function/Parameter
DMA DRAM Target Address [18:0]
DMA DRAM Write Data [7:0]
DMA Mode [1:0]
Display Override Luma Frame Store Start Address
[15:0]
Display Override Chroma Frame Store Start
Address [15:0]
Host Top Field First bit
Display Override Mode [1:0]
Decode Start/Stop Command
Anchor Luma Frame Store 1 Base Address [15:0] 224 and 225
Anchor Chroma Frame Store 1 Base Address
[15:0]
Override Picture Width [6:0]
47
47
9.8.
Cr12
Y13
Cr4
Y5
40
40
Override Display Registers
39
39
Cb12
Y12
Cb4
Y4
32
32
31
31
Cr10
Y11
Cr2
Y3
24
24
23
23
Cb10
Y10
Cb2
Y2
16
16
Register/Field Page Ref.
213–215
219
193[2:1]
285 and 286
287 and 288
275 bit 4
265[5:4]
246 bit 0
226 and 227
283[6:0]
15
15
Y1
Y9
Cr0
Cr8
8
8
7
7
Cb0
Cb8
4-46
4-47
4-39
4-68
4-62
4-59
4-57
4-48
4-67
Y0
Y8
0
0
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