L64105 LSI Logic Corporation, L64105 Datasheet - Page 111

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Figure 4.37
Figure 4.38
Reg. 111
Reg. 112
Reg. 113
Reg. 114
Reg. 115
Reg. 116
MSB
MSB
LSB
LSB
Registers 111–113 (0x06F–0x071) Audio ES Channel Buffer Compare
DTS Address [18:0]
Registers 114–116 (0x072–0x074) Audio PES Header/System Channel
Buffer Write Address [19:0]
7
7
The host can write an audio channel address in these registers to be
compared with one of the current read pointer addresses of the Audio ES
channel buffer. When the selected current read pointer address matches
the contents of the registers and the chip is in one of the Audio Read
Compare modes (Register 69, bits 1 and 2,
Event Interrupt bit (Register 2, bit 6,
generated, if not masked, by asserting the INTRn output signal.
This can be used by the host as an aid to audio/video synchronization.
When INTRn is asserted, the host should read Registers 0 through 4 to
determine the cause of the interrupt, take the necessary action, and
deassert INTRn by setting the Clear Interrupt Pin bit (Register 6, bit 0,
page
These registers contain the current write pointer address of the Audio
PES Header/System channel buffer. The LSB should be read first. since
this captures the next significant byte and MSB in Registers 115 and
116. These should then be read immediately to ensure that the correct
captured value is read. When set, the most significant bit (bit 3 of
Register 116) indicates that the write pointer has wrapped around from
the end address to the start address of the buffer.
Registers 117–119 (0x075–0x077) Reserved
Video Decoder Registers
4-10).
Audio PES Header/System Channel Buffer Write Address [15:8]
Audio PES Header /System Channel Buffer Write Address [7:0]
Reserved
Audio ES Channel Buffer Compare DTS Address [15:8]
Audio ES Channel Buffer Compare DTS Address [7:0]
Reserved
4
Read Only
Read Only
Write
Write
Audio PES Header/System Channel Buffer Write
3
3
page
4-6) is set and an interrupt is
Audio ES Channel Buffer Compare
page
Address [19:16]
2
Read Only
DTS Address [18:16]
4-21), the DTS Audio
Write
0
0
[7:0]
4-29