L64105 LSI Logic Corporation, L64105 Datasheet - Page 96
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
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Figure 4.11
4-14
Capture on
Video PES
Ready
7
Capture on
Audio PES
Register 17 (0x011)
Ready
6
SCR Compare/Capture Mode [1:0]
Capture on Picture Start Code
Capture on Audio Sync Code
Capture on Beginning of Active Video (BAV)
Capture on Pack Data Ready
Register Descriptions
Capture on
Pack Data
Ready
5
The value of these two bits sets the operating mode of
Registers 13, 14, 15, and 16 as shown in the following
table.
Mode Bits Mode
0b00
0b01
0b10
0b11
When this bit is set and the L64105 is in the Capture
Mode, the SCR Counter value is captured and written to
Registers 13 through 16 when the preparser detects the
Picture Start Code.
When this bit is set and the L64105 is in the Capture
Mode, the SCR Counter value is captured and written to
Registers 13 through 16 when the preparser detects the
Audio Sync Code.
When this bit is set and the L64105 is in the Capture
Mode, the SCR Counter value is captured and written to
Registers 13 through 16 when the preparser detects the
Beginning of Active Video.
When this bit is set and the L64105 is in the Capture
Mode, the SCR Counter value is captured and written to
Registers 13 through 16 when the preparser detects
Pack Data Ready.
Capture on
BAV
4
No compare and capture.
SCR overflow works.
Capture
Compare
Reserved
Audio Sync
Capture on
Code
3
Picture Start
Capture on
Code
2
SCR Compare/Capture
1
Mode
R/W 1:0
R/W 2
R/W 3
R/W 4
R/W 5
0
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