L64105 LSI Logic Corporation, L64105 Datasheet - Page 300

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Figure 9.3
9-8
FCODE:
INIT = LINE 4
F = 0
ODD FIELD
FCODE = LINE 265
NEW FIELD = LINE 266
F = 1
EVEN FIELD
LINE = 3
LINE = 4
Vertical Timing Vcodes and Fcodes for NTSC
The Vcode Zero field of Register 303
number at which the vertical blanking bit in the EAV code should change
from one to zero. This value is dependent on the particular timing
system. It is typically set to 21 for NTSC and PAL.
The Vcode Even fields of Registers 303 and 304
combined to specify the line number at which the vertical blanking bit in
the EAV code should change from zero to one during the even field time.
In some timing systems (for example, 525-line NTSC systems), the odd
field requires one additional line before changing the Vcode. Such
systems are handled by programming the Vcode Even Plus 1 bit in
Register 303. For an NTSC system, the Vcode Even value should be 262
and the Vcode Even Plus 1 should be set to 1. For a PAL system, the
Vcode Even value should be 310 and the Vcode Even Plus 1 should be
cleared to 0.
Video Interface
Even field = 262 lines
Odd field = 263 lines
Active Video
Active Video
Blanking
Blanking
(main)
(main)
VCODE (verical blanking)
LINE = 1
V = 1
VCODE ZERO = LINE 21 - [V = 0]
MAIN START = LINE 23 - [V = 0]
V = 0
MAIN END = 262 - VCODE EVEN = 262
[V = 1] - LINE 264 (because VCODE EVEN PLUS 1 = 1)
V = 1
[V = 0]
V = 0
LINE = 525 - [V = 0]
(page
4-70) specifies the line
(page
4-71) are