L64105 LSI Logic Corporation, L64105 Datasheet - Page 202

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Figure 6.3
VVALIDn
Figure 6.4
Int VVALIDn
6-6
AVALIDn
Int AVALIDn
CH_DATA
Invert Channel Clock Bit
VVALIDn
AVALIDn
DCK
Pulldown
Resistor
DCK
Register 5
audio_valid_rise_pulse
video_valid_rise_pulse
xVALIDn Input Synchronization Circuits
Synchronous Valid Signals Timing
The constraints on synchronous valid signal mode are:
1. AVALIDn and VVALIDn should never be low at the same time. The
Channel Interface
CH_DATA[7:0]
valid byte on CH_DATA[7:0] is either audio or video.
DCK
A0
A1
A2
SYSCLK
A3
SYSCLK
VVALID_rise_pulse
AVALID_rise_pulse
ld
A4
Audio Delayed Data
V0
Internal Data