L64105 LSI Logic Corporation, L64105 Datasheet - Page 434

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

memory test address bits
memory test output select bit
memory test pass/fail status bits
metastability
microcontroller
microcontroller program counter bit
miscellaneous signals
missing data
MIX enable bit
mix weight control bit (OSD)
MIX[3:0] bit
mixed OSD
mixing
mixing ratios
IX-18
SDRAM configurations
signals
See also host interface
arbitration priority
Aux data processing
bitstream sample override 10-12,
channel monitoring
channel space allocation
channel writes 6-9,
compare DTS register bits
display freeze
display parameters
error recovery
external SDRAM accesses
frame stores 8-32,
override picture width rip forward mode
panic mode select bits
picture start code and
program counter
Q table entry reads
registers
resetting
SDRAM source updates
SDRAM target updates
SDRAM updates
select
specifying pan/scan control
starting video decoder
stopping video decoder 8-26,
stream selection
user data processing
video overrides
OSD data
broken link mode
force rate reconstruction
repeat frame mode
skip frame mode
external
9-2
2-3
2-7
9-27
2-8
4-48
2-11
6-8
8-49
9-27
9-30
1-2
9-28
9-32
9-36
8-49
9-13
6-9
4-57
4-42
7-6
8-34
2-11
8-25
6-13
9-4
8-14
8-35
8-20
8-43
Index
8-23
4-52
4-91
8-26
8-38
8-40
7-2
4-46
4-46
7-8
4-61
4-92
6-28
6-27
9-33
8-44
4-93
8-27
4-57
to
10-16
9-35
8-41
mode
mode select audio decoder bits
modes
2-frame store
3-frame store
active video at blanking 4-67,
asynchronous
audio decoder
audio decoder normal
audio dual-mono
audio formatter
audio formatter play
audio play 4-79, 10-6,
bus
bypass 4-44, 4-81,
capture 4-13, 4-14, 5-7,
channel pause
channel request
channel transfer
compare 4-13, 4-14, 5-7,
continuous repeat frame 4-51,
continuous skip frame 4-50,
DAC output timing
decoder play status
decoder selection
determining operational
diagnostic
display controller
DMA 4-39,
elementary stream
endian, changing 5-11,
fast play
force broken link
force video background 4-59,
frame override
freeze 4-62, 9-20,
Intel read cycles
Intel write cycles
manufacturing test
Motorola read cycles
Motorola write cycles
normal play
caution for use
caution for use
16 bit
20 bit
24 bit
clock synchronization
internal phase states
programmable delays
SDRAM internal state
enable bits
selection table
2-3
10-7
10-27
10-28
10-28
5-14
10-7
8-34
8-30
6-3
10-3
4-63
4-68
6-8
4-80
4-10
6-8
5-5
4-82
4-54
5-5
4-81
4-64
9-36
5-8
5-8
2-12
6-14
6-8
4-78
10-8
5-4
5-3
2-9
10-18
5-12
5-6
5-8
4-45
4-44
4-44
5-8
4-44
4-51
10-2
9-12
9-7
4-52
to
9-13