BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 120

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14. DMACC0LLI (DMAC Channel0 Linked List Item Register)
[31:2]
[1]
[0]
[Description]
a. <LLI>
Bit
disabled after all DMA transfers associated with it are completed.
• DMACCxLLI (DMAC Channel x Linked List Item Register) (x = 0 to 7)
The value set to <LLI> must be within 0xFFFF_FFF0.
If the LLI is 0, then the current LLI is the last in the chain, and the DMA channel is
The structure and explanation of these registers are same as DMACC0LLI.
Please refer to the explanation of DMACC0LLI.
For the name and addresse of these registers, please refer to Table 3.8.3.
LLI
LM
Symbol
Bit
R/W
R/W
Type
TENTATIVE
TMPA900CM- 119
0x00000000
Undefined
0y0
Reset
Value
Set the start address of the next transfer information
Read as undefined. Write as zero.
AHB master for storing LLI:
0y0: DMA1
0y1: DMA2
Address = (0xF410_0000) + (0x0108)
Description
TMPA900CM
2009-10-14

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