BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 321

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

<BUSY> flag
NDWEn pin
NDALE pin
NDRB pin
NDCLE pin
to check the state of the NAND-Flash memory (NDRB pin). It is set to 1 when the
NAND-Flash is “busy” and to 0 when it is “ready”. Since the NDFC incorporates a noise
filter of several clocks, a change in the NDR/B pin state is reflected on the <BUSY> flag
after some delay.
ECC, set NDFMCR1<ECCS> = 1), then write 1 once to this bit, and the ECC in this
circuit is reset (reset is released automatically). The contents of the NDECCRDn
register are also reset at the same time.
h. <BUSY>
i. <ECCRST>
The <BUSY> bit is used for both Hamming and Reed-Solomon codes. This bit is used
The <ECCRST> bit is used for both Hamming and Reed-Solomon codes.
To reset the Hamming ECC, set NDFMCR1<ECCS> = 0 (to reset the Reed-Solomon
When you reset ECC, set <ECCE> to 1.
command
Read
Address input
TENTATIVE
TMPA900CM- 320
Delay
Sensing <BUSY> flag
TMPA900CM
2009-10-14