BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 304

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

[31:24]
[23:16]
[15:13]
[12]
[11]
[10]
[9:7]
[6]
[5:3]
[2]
[1:0]
Bit
Note: These registers cannot be read while they are in the Reset state.
7.
Reserved
Reserved
burst_align
bls
Reserved
−
wr_bl
wr_sync
rd_bl
rd_sync
mw
smc_opmode0_1_5 (SMC Opmode Registers 0 <1>)
Symbol
Bit
RO
RO
RO
RO
RO
−
RO
RO
RO
RO
RO
Type
TENTATIVE
TMPA900CM- 303
0x60
0xE0
0y000
0y0
0y1
Undefined
0y000
0y0
0y000
0y0
0y10
Reset
Value
Read as 0x60.
Read as 0xE0.
Memory burst boundary split set value:
0y000 = bursts can cross any address boundary
0y001 = split at the 32-beat burst boundary
0y010 = split at the 64-beat burst boundary
0y011 = split at the 128-beat burst boundary
0y100 = split at the 256-beat burst boundary
other = Reserved
bls timing :
0y0 = chip select
0y1 = Reserved
−
Read as undefined.
Write memory burst length:
0y000 = 1-beat
0y001 = 4-beats
other = Reserved
Memory operation mode:
0y0 = asynchronous write operation
0y1 = Reserved
Read memory burst length:
0y000 = 1 beat
0y001 = 4 beats
other = Reserved
Memory operation mode:
0y0 = asynchronous read operation
0y1 = Reserved
Memory data bus width :
0y00 = Reserved
0y01 = 16-bits
0y10 = 32-bits
0y11 = Reserved
Address = (0xF431_1000) + (0x0124)
Description
TMPA900CM
2009-10-14