BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 673

• Manufacturer Part Number: BMSKTOPASA900(DCE)
• Description: KIT STARTER TMPA900 USB JTAG
• Manufacturer: Toshiba
• Series: TOPASr
• Type: MCUr

Specifications of BMSKTOPASA900(DCE)

• Contents: Evaluation Board, Cable(s), Software and Documentation
• For Use With/related Products: TMPA900CMXBG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.19.2.6
3.19.2.7
3.19.2.8
internal clock (HCLK) and LCDC. The LCLCP signal can be programmed in the range
of HCLK/2 to HCLK/1025 according to the data rate of the LCD panel.
timings.
one type of joint interrupt.
Panel Clock Generator
Timing Controller
Creating Interrupts
Can set the frequency division rate of data transfer clock (LCLCP signal) used in the
The main function of the timing controller block is to adjust horizontal/vertical
The CLCDC generates four types of interrupts that are maskable individually and
TMPA900CM
CLCDC
Panel
LCD
TENTATIVE
TMPA900CM- 672
LCDCP
Bus Speed
HCLK
VRAM
TMPA900CM
2009-10-14